diff --git a/NEWPROPOSAL/FULLPROP.tex b/NEWPROPOSAL/FULLPROP.tex
index c80b86dbf83ea7ff5003fde0b4789720c503fec2..c4799d7c8cb4102ffef709b39e92da6997186ae3 100644
--- a/NEWPROPOSAL/FULLPROP.tex
+++ b/NEWPROPOSAL/FULLPROP.tex
@@ -1,4 +1,4 @@
-
+% !TEX TS-program = pdflatexmk 
 \RequirePackage[l2tabu,orthodox]{nag}
 \documentclass[11pt,a4paper]{article} 
 \usepackage{etex}
@@ -13,9 +13,9 @@
 
 
 \usepackage{diagrams}  
-\input{figures/cnot.tex} 
+\input{figures/cnot.tex}  
 
-\begin{document}
+\begin{document} 
 
 \newcommand\projtitle{Compilation and optimisation for near-term quantum computing using the ZX calculus}
 \newcommand\projacro{Co-Op ZX} 
@@ -629,21 +629,21 @@ general framework for compilation of HLLs to \azx.
 Since most existing quantum HLLs can output circuit descriptions, and
 since circuits can easily be represented in the \zxcalculus, we first
 focus on a simple front end for the circuit language
-QASM~\cite{Cross2017Open-Quantum-As} in \ref{task:testBench}.  This
+QASM~\cite{Cross2017Open-Quantum-As} in \ref{task:HHL} before moving
+towards more expressive HHLs.  This
 will allow \azx terms to be produced from virtually any extant quantum
 HLL, albeit rather naively.  Later, we will perform concrete front-end
-experiments using more sophisticated existing HLLs, for example
+experiments using more sophisticated existing HLLs in, for example
 \emph{Quipper}, Q\#~\cite{qsharp}, or ProjectQ
-\cite{Steiger2016ProjectQ:-An-Op} during the
-task~\ref{task:betterboxes}.
-%
+\cite{Steiger2016ProjectQ:-An-Op}, with the help of 
+Task~\ref{task:betterboxes}.
+
 The open database of tests developed in \ref{task:testBench} will
 serve as a measuring tool for the quality of the output. The database
 will also be made available to the community for rating and testing
 future compilers or optimisation techniques.  To encourage interaction
 from other research groups, and to support other languages, both our
-interface and the \azx language will be made
-public.
+interface and the \azx language will be made public.
 
 %% OUTDATED
 % This work package consists of a back-and-forth interaction between
@@ -667,7 +667,9 @@ Primitive operations will require different amounts of time,
 different qubit implementations have different failure
 modes.\REM{noise,fidelitY}
 
-Due to its novelty, we adopt an exploratory approach.  Initially, and
+Due to the novelty of our proposal, we adopt an exploratory approach
+with respect to back-end models.
+Initially, and
 in parallel, we study the circuit model (\ref{task:circuit-model}) and
 the 1-way model (\ref{task:mbqc-model}) because these models are well
 understood, stable, and have been extensively treated in the
@@ -1124,12 +1126,12 @@ users for the final products.  The board comprises:
 \item Peter Selinger (Dalhousie), 
 \item Andreas Wallraff (ETH Z\"urich), 
 \item Philip Walther (Vienna), 
-\item Will Zeng (Rigetti Quantum Computing).  
+\item \bR Will Zeng (Rigetti Quantum Computing) --- may be fired soon\e.  
+\item \bR Morre suggestions: Winfried Hensinger, Mike Mosca, Martin Roetteler\e.
 \end{itemize}
 Letters of support from the board members are attached at the end of
 this document.}
 
-
 \newpage
 \section{IMPLEMENTATION}
 \label{sec:impl-2-pages}
@@ -1297,9 +1299,16 @@ In the first instance we make contact between \zx and standard circuit and measu
   }
   %
 
+  \WPtask[\label{task:HHL}]{Front-end (M3--M36; responsible 3;
+    involved 2,4,5) }{%
+    Propose compiler front-end from known HLLs such as QASM, Quipper
+    or Q\# to \azx. This task serves as a test-bed
+    for~\ref{task:testBench} and~\ref{task:trans1}.
+    %
+  }
   \WPtask[\label{task:testBench}]{Open test-suite (M3--M36;
     responsible 3; involved 2,4,5) }{%
-    Devise a test-suite of concrete instances of circuits and
+Devise test-suite of concrete instances of circuits and
     algorithms to rate success of other WPs. This includes the task of protocol extraction from current known HLLs.
     The tests will rate various aspects of algorithms, such as controls, manipulation of
     classical wires, scalability, depth of circuits, topologies of